The present disclosure relates to semiconductor device fabrication, and more specifically, to extreme ultraviolet (EUV) masks including absorbers having various sidewall configurations.
In conventional fabrication of semiconductor devices, semiconductor wafers are processed in batches including a large number of integrated circuit (IC) structures on a single wafer. As semiconductor fabrication progresses, it becomes more desirable to increase the number of structures and decrease the size of the structures formed on the single wafer. As a result, the critical dimensions of on the wafer are further reduced as well. In order to satisfy the increasingly constricting critical dimension requirements, extreme ultraviolet (EUV) lithography techniques are used.
Extreme ultraviolet (EUV) lithography enables the fabrication of semiconductor devices having critical dimensions less than 28 nanometers (nm) in width. In contrast to conventional lithography techniques, EUV lithography utilizes extreme ultraviolet (EUV) light to transfer a circuit reflective portions of an EUV photomask (referred to herein as an “EUV mask”) to a semiconductor die. In one common implementation, the EUV mask includes a substrate, a multi-layer (ML) reflector formed over the substrate, and an absorber layer formed over the ML reflector. The ML reflector is designed to reflect EUV light at a chosen EUV wavelength (e.g., 13.5 nanometers). The absorber layer is designed to absorb EUV at the same chosen EUV wavelength. Utilizing conventional lithography, the absorber layer is patterned to expose selected areas of the underlying ML reflector corresponding to a desired circuit layout. The remaining portions of the absorber layer (referred to herein as “absorber structures”) absorb EUV light that is not desired to be reflected to wafer.
During EUV lithography, EUV light is projected through a system of mirrors onto the EUV mask at a slight angle relative to the mask surface (commonly referred to as an “angle of incidence”). The EUV light impinging the absorber structures is absorbed; while the light impinging upon the exposed regions of the ML reflector is reflected from the EUV mask onto a layer of photoresist, which is then used to transfer a desired circuit layout to a semiconductor die. Due to the angle of incidence of the EUV light used during EUV lithography, a shadowing effect occurs where portions of the incoming and outgoing EUV light are blocked by the upper sidewall portions of the absorber structures. The shadowing effect may skew the critical dimensions of the structures being patterned on the semiconductor die. Conventional solutions for minimizing the shadowing effect include reducing the thickness or height of the absorber structures. One problem associated with this solution is that reducing the thickness or height of the absorber structures also reduces the absorptivity of the absorber material.